type CPU cpuid.CPU

type Feature cpuid.Feature

const (
	SSE                Feature = 1 << iota // SSE functions
	SSE2                                   // P4 SSE functions
	SSE3                                   // Prescott SSE3 functions
	SSE41                                  // Penryn SSE4.1 functions
	SSE42                                  // Nehalem SSE4.2 functions
	SSE4A                                  // AMD Barcelona microarchitecture SSE4a instructions
	SSSE3                                  // Conroe SSSE3 functions
	AVX                                    // AVX functions
	AVX2                                   // AVX2 functions
	AVX512BF16                             // AVX-512 BFLOAT16 Instructions
	AVX512BITALG                           // AVX-512 Bit Algorithms
	AVX512BW                               // AVX-512 Byte and Word Instructions
	AVX512CD                               // AVX-512 Conflict Detection Instructions
	AVX512DQ                               // AVX-512 Doubleword and Quadword Instructions
	AVX512ER                               // AVX-512 Exponential and Reciprocal Instructions
	AVX512F                                // AVX-512 Foundation
	AVX512IFMA                             // AVX-512 Integer Fused Multiply-Add Instructions
	AVX512PF                               // AVX-512 Prefetch Instructions
	AVX512VBMI                             // AVX-512 Vector Bit Manipulation Instructions
	AVX512VBMI2                            // AVX-512 Vector Bit Manipulation Instructions, Version 2
	AVX512VL                               // AVX-512 Vector Length Extensions
	AVX512VNNI                             // AVX-512 Vector Neural Network Instructions
	AVX512VP2INTERSECT                     // AVX-512 Intersect for D/Q
	AVX512VPOPCNTDQ                        // AVX-512 Vector Population Count Doubleword and Quadword
	CMOV                                   // Conditional move
)