type CPU cpuid.CPU

type Feature cpuid.Feature

const (
	SWP      Feature = 1 << iota // SWP instruction support
	HALF                         // Half-word load and store support
	THUMB                        // ARM Thumb instruction set
	BIT26                        // Address space limited to 26-bits
	FASTMUL                      // 32-bit operand, 64-bit result multiplication support
	FPA                          // Floating point arithmetic support
	VFP                          // Vector floating point support
	EDSP                         // DSP Extensions support
	JAVA                         // Java instruction set
	IWMMXT                       // Intel Wireless MMX technology support
	CRUNCH                       // MaverickCrunch context switching and handling
	THUMBEE                      // Thumb EE instruction set
	NEON                         // NEON instruction set
	VFPv3                        // Vector floating point version 3 support
	VFPv3D16                     // Vector floating point version 3 D8-D15
	TLS                          // Thread local storage support
	VFPv4                        // Vector floating point version 4 support
	IDIVA                        // Integer divide instruction support in ARM mode
	IDIVT                        // Integer divide instruction support in Thumb mode
	VFPD32                       // Vector floating point version 3 D15-D31
	LPAE                         // Large Physical Address Extensions
	EVTSTRM                      // Event stream support
	AES                          // AES hardware implementation
	PMULL                        // Polynomial multiplication instruction set
	SHA1                         // SHA1 hardware implementation
	SHA2                         // SHA2 hardware implementation
	CRC32                        // CRC32 hardware implementation
)