package arch
import "cmd/asm/internal/arch"
Package arch defines architecture-specific information and support functions.
Index ¶
- Constants
- func ARM64RegisterArrangement(reg int16, name, arng string) (int64, error)
- func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error
- func ARM64RegisterListOffset(firstReg, regCnt int, arrangement int64) (int64, error)
- func ARM64RegisterShift(reg, op, count int16) (int64, error)
- func ARM64SpecialOperand(name string) arm64.SpecialOperand
- func ARM64Suffix(prog *obj.Prog, cond string) bool
- func ARMConditionCodes(prog *obj.Prog, cond string) bool
- func ARMMRCOffset(op obj.As, cond string, x0, x1, x2, x3, x4, x5 int64) (offset int64, op0 obj.As, ok bool)
- func IsARM64ADR(op obj.As) bool
- func IsARM64CASP(op obj.As) bool
- func IsARM64CMP(op obj.As) bool
- func IsARM64STLXR(op obj.As) bool
- func IsARM64TBL(op obj.As) bool
- func IsARMBFX(op obj.As) bool
- func IsARMCMP(op obj.As) bool
- func IsARMFloatCmp(op obj.As) bool
- func IsARMMRC(op obj.As) bool
- func IsARMMULA(op obj.As) bool
- func IsARMSTREX(op obj.As) bool
- func IsLoong64AMO(op obj.As) bool
- func IsLoong64MUL(op obj.As) bool
- func IsLoong64PRELD(op obj.As) bool
- func IsLoong64RDTIME(op obj.As) bool
- func IsMIPSCMP(op obj.As) bool
- func IsMIPSMUL(op obj.As) bool
- func IsPPC64CMP(op obj.As) bool
- func IsPPC64NEG(op obj.As) bool
- func IsRISCV64AMO(op obj.As) bool
- func IsRISCV64VTypeI(op obj.As) bool
- func Loong64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error
- func ParseARMCondition(cond string) (uint8, bool)
- func RISCV64SpecialOperand(name string) riscv.SpecialOperand
- func RISCV64ValidateVectorType(vsew, vlmul, vtail, vmask int64) error
- type Arch
Constants ¶
const ( RFP = -(iota + 1) RSB RSP RPC )
Pseudo-registers whose names are the constant name without the leading R.
Functions ¶
func ARM64RegisterArrangement ¶
ARM64RegisterArrangement constructs an ARM64 vector register arrangement.
func ARM64RegisterExtension ¶
ARM64RegisterExtension constructs an ARM64 register with extension or arrangement.
func ARM64RegisterListOffset ¶
ARM64RegisterListOffset generates offset encoding according to AArch64 specification.
func ARM64RegisterShift ¶
ARM64RegisterShift constructs an ARM64 register with shift operation.
func ARM64SpecialOperand ¶
func ARM64SpecialOperand(name string) arm64.SpecialOperand
ARM64SpecialOperand returns the internal representation of a special operand.
func ARM64Suffix ¶
ARM64Suffix handles the special suffix for the ARM64. It returns a boolean to indicate success; failure means cond was unrecognized.
func ARMConditionCodes ¶
ARMConditionCodes handles the special condition code situation for the ARM. It returns a boolean to indicate success; failure means cond was unrecognized.
func ARMMRCOffset ¶
func ARMMRCOffset(op obj.As, cond string, x0, x1, x2, x3, x4, x5 int64) (offset int64, op0 obj.As, ok bool)
ARMMRCOffset implements the peculiar encoding of the MRC and MCR instructions. The difference between MRC and MCR is represented by a bit high in the word, not in the usual way by the opcode itself. Asm must use AMRC for both instructions, so we return the opcode for MRC so that asm doesn't need to import obj/arm.
func IsARM64ADR ¶
IsARM64ADR reports whether the op (as defined by an arm64.A* constant) is one of the comparison instructions that require special handling.
func IsARM64CASP ¶
IsARM64CASP reports whether the op (as defined by an arm64.A* constant) is one of the CASP-like instructions, and its 2nd destination is a register pair that require special handling.
func IsARM64CMP ¶
IsARM64CMP reports whether the op (as defined by an arm64.A* constant) is one of the comparison instructions that require special handling.
func IsARM64STLXR ¶
IsARM64STLXR reports whether the op (as defined by an arm64.A* constant) is one of the STLXR-like instructions that require special handling.
func IsARM64TBL ¶
IsARM64TBL reports whether the op (as defined by an arm64.A* constant) is one of the TBL-like instructions and one of its inputs does not fit into prog.Reg, so require special handling.
func IsARMBFX ¶
IsARMBFX reports whether the op (as defined by an arm.A* constant) is one the BFX-like instructions which are in the form of "op $width, $LSB, (Reg,) Reg".
func IsARMCMP ¶
IsARMCMP reports whether the op (as defined by an arm.A* constant) is one of the comparison instructions that require special handling.
func IsARMFloatCmp ¶
IsARMFloatCmp reports whether the op is a floating comparison instruction.
func IsARMMRC ¶
IsARMMRC reports whether the op (as defined by an arm.A* constant) is MRC or MCR.
func IsARMMULA ¶
IsARMMULA reports whether the op (as defined by an arm.A* constant) is MULA, MULS, MMULA, MMULS, MULABB, MULAWB or MULAWT, the 4-operand instructions.
func IsARMSTREX ¶
IsARMSTREX reports whether the op (as defined by an arm.A* constant) is one of the STREX-like instructions that require special handling.
func IsLoong64AMO ¶
func IsLoong64MUL ¶
IsLoong64MUL reports whether the op (as defined by an loong64.A* constant) is one of the MUL/DIV/REM instructions that require special handling.
func IsLoong64PRELD ¶
func IsLoong64RDTIME ¶
IsLoong64RDTIME reports whether the op (as defined by an loong64.A* constant) is one of the RDTIMELW/RDTIMEHW/RDTIMED instructions that require special handling.
func IsMIPSCMP ¶
IsMIPSCMP reports whether the op (as defined by an mips.A* constant) is one of the CMP instructions that require special handling.
func IsMIPSMUL ¶
IsMIPSMUL reports whether the op (as defined by an mips.A* constant) is one of the MUL/DIV/REM/MADD/MSUB instructions that require special handling.
func IsPPC64CMP ¶
IsPPC64CMP reports whether the op (as defined by an ppc64.A* constant) is one of the CMP instructions that require special handling.
func IsPPC64NEG ¶
IsPPC64NEG reports whether the op (as defined by an ppc64.A* constant) is one of the NEG-like instructions that require special handling.
func IsRISCV64AMO ¶
IsRISCV64AMO reports whether op is an AMO instruction that requires special handling.
func IsRISCV64VTypeI ¶
IsRISCV64VTypeI reports whether op is a vtype immediate instruction that requires special handling.
func Loong64RegisterExtension ¶
func Loong64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error
Loong64RegisterExtension constructs an Loong64 register with extension or arrangement.
func ParseARMCondition ¶
ParseARMCondition parses the conditions attached to an ARM instruction. The input is a single string consisting of period-separated condition codes, such as ".P.W". An initial period is ignored.
func RISCV64SpecialOperand ¶
func RISCV64SpecialOperand(name string) riscv.SpecialOperand
RISCV64SpecialOperand returns the internal representation of a special operand.
func RISCV64ValidateVectorType ¶
RISCV64ValidateVectorType reports whether the given configuration is a valid vector type.
Types ¶
type Arch ¶
type Arch struct {
*obj.LinkArch
// Map of instruction names to enumeration.
Instructions map[string]obj.As
// Map of register names to enumeration.
Register map[string]int16
// Table of register prefix names. These are things like R for R(0) and SPR for SPR(268).
RegisterPrefix map[string]bool
// RegisterNumber converts R(10) into arm.REG_R10.
RegisterNumber func(string, int16) (int16, bool)
// Instruction is a jump.
IsJump func(word string) bool
}
Arch wraps the link architecture object with more architecture-specific information.
func Set ¶
Set configures the architecture specified by GOARCH and returns its representation. It returns nil if GOARCH is not recognized.
Source Files ¶
arch.go arm.go arm64.go loong64.go mips.go ppc64.go riscv64.go s390x.go
- Version
- v1.25.0-rc.1
- Published
- Jun 11, 2025
- Platform
- windows/amd64
- Imports
- 13 packages
- Last checked
- 27 minutes ago –
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